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Last updated 11/2019
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 638.46 MB | Duration: 1h 53m
Learn to use Xilinx Vivado HLS software to design and implement FPGA circuits, test and simulate VHDL code & much more
What you'll learn
Understand VHDL and generate your code in Vivado
Understand the difference between digital devices
Implement a micro blaze soft processor in Vivado
Test and simulate your code in Vivado
Learn TCL commands to generate the Micro blaze soft processor
Creating a memory block using Vivado
Practical quizzes along the way to test your knowledge & skills
Much more... Everything you need to learn about Vivado, FPGA development & VHDL code is covered step by step
Requirements
You must know basic logic design and electronics
You must have PC with windows/Linux or MAC
Installed Vivado software (I will show you how to install Vivado step by step)
Description
THE BEST DEDICATED VIVADO FPGA DEVELOPMENT COURSE FOR BEGINNERSThe main goal of this course to teach you how to work with Vivado software to design and implement FPGA circuits.I will teach you how to test and simulate the VHDL code, additionally, you will also be able to work with any similar tools like Vivado when you are done.Students will understand FPGA architecture and will learn FPGA design flow from beginning to end. In this course, students will also get an overview of more advanced technologies such as ASIC and VLSI. The course will cover topics like
Overview
Section 1: Introduction
Lecture 1 The digital design fundamentals you must learn
Section 2: Digital systems
Lecture 2 Analog and Digital Systems
Lecture 3 Classifications of Digital Systems
Lecture 4 FPGA Architecture
Lecture 5 Download and install Vivado
Lecture 6 Quiz 1
Lecture 7 Solution 1
Section 3: VHDL
Lecture 8 Intro to VHDL
Lecture 9 FPGA Design Flow
Lecture 10 Creating your first project in Vivado
Lecture 11 Vivado Design Tools
Lecture 12 Simulating your VHDL code
Lecture 13 Implement your design
Section 4: Memory
Lecture 14 Quiz 2
Lecture 15 Solution 2
Lecture 16 IP Flows
Lecture 17 IP integrator in Vivado
Lecture 18 Memory Controllers
Lecture 19 Creating a memory block in the integrator
Section 5: Processor options
Lecture 20 Testing and Simulating
Lecture 21 Quiz 3
Lecture 22 Solution 3
Lecture 23 Processor Options
Lecture 24 Implement a Micro blaze soft Processor
Lecture 25 Learn TCL Commands to generate Micro blaze soft processor
Lecture 26 Generate HDL commands from c based code
Lecture 27 Quiz 4
Lecture 28 Solution 4
Section 6: Conclusion
Lecture 29 Conclusion
Lecture 30 Bonus lecture
Anyone who wants to learn FPGA development & Vivado in a step by step way
Homepage
Code:
https://www.udemy.com/course/xilinx-vivado-fpga-development-for-complete-beginners/
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